LT9102—MIPI Single-port to MIPI Dual-port

Single-Port MIPIDSI/CSI Receiver
Complian twith D-PHY2.1&DSI1.1&CSI-22.0- 1clock laneand1/2/3/4configurabledata lanes perport- Up to4.5Gbps per data lane
Complian twith C-PHY1.2&DSI-21.0&CSI-22.0- 1/2/3configu rable data trios-Up to3.5Gsps per data trio
Support BTA(Bus Turnaround)
Support up to4K@90Hz RGB 8bpc
Suppor tup to8K@60 DSC pass-through
Dual-Port MIPI®DSI/CSI Transmitter
Complian twithD-PHY2.1&DSI1.1&DSI-21.0&CSI-2
2.0- Sup port1/2configu rable ports- 1clocklaneand1/2/3/4configurable data lanes per
port- Up to4.5Gbps per data lane
Comp lian twith C-PHY1.2 &DSI-21.0&CSI-2 2.0- Support1/2configu rable ports- 1/2/3configu rable data trios perport- Up to3.5Gsps per data trio
DSI Sup port16/20/24-bit YCbCr4:2:2,16/18/24/30-bit
RGB,12-bit YcbCr420,12Compressed Pixel Stream
CSI Sup port RGB888/666/565,YUV4228/10bit,
YUV420 8bit(legacy), RAW(pass-through)
Sup port DSI LowPower Command
Sup port side by sidean deven/odd 3Dmode
Sup port DSI Video mode
Sup port DSI Command mode(pass-through)
D-PHY sup port port swap,lane swap and PN swap
C-PHY sup port port swap and trio swap
Sup port mirror copyon two ports
Sup port virtual channel dataseparation ontwoports
Programmabletransmitter swingandpre-emphasis
OSD
Sup port font-basedandbit-mapOSD
Sup port adjustable transparency
Sup port Variable RefreshRate
Miscellaneous
CSC:RGB<->YCbCr4:4:4<->YCbCr4:2:2